The present invention relates to a display device, and particularly, relates to a display device of a panel type having plural pixels arranged in a matrix shape on a substrate, and a flexible printed board for supplying display data and a predetermined required voltage from a driving circuit chip for operating each of these pixels and an external circuit.
A thin panel type display device light in weight is used as a display device of each of a personal computer, a portable telephone set or a portable information terminal called PDA, etc., and a monitor of each of various kinds of information devices. In this panel type display device, a display device using a liquid crystal panel, a display device using an electro-luminescence (EL) panel, a display device using a plasma panel, or a display device using a panel with a carbon nanotube (CNT), etc. as an electronic source, etc. are known.
In the panel type display device of this kind, plural pixels are normally arranged in the matrix shape in the sticking gap of two substrates and are set to a display area. A driving circuit for operating the pixels is generally mounted outside the display area. Driving lines are arranged in one direction of a substrate face and another direction crossing this one direction, and the pixels arranged in the matrix shape are constructed in crossing portions of both the driving lines. There are various constructing methods of the pixels. In these constructing methods, there are a simple matrix method and an active matrix system. In the simple matrix system, superposition of voltage at an intersecting point of both the above driving lines is utilized. In the active matrix system, a switching element is arranged every unit pixel and is selectively lighted.
However, the active matrix system for selectively lightening and displaying the switching element every unit pixel in view of resolution, contrast and operating speed in recent years has become the main current. In the display device of each system, the driving circuit (so-called driver) is arranged outside the display area to supply a driving voltage or a display signal to each driving line. The driver of this kind is normally mounted onto a display substrate or another substrate such as a flexible printed board, etc. connected to the display substrate as a semiconductor chip (driving IC or driving circuit chip).
The display device of the typical active matrix system has a pixel constructed by an optical modulating element such as a liquid crystal, etc. or a light emitting element and a light emitting mechanism in the sticking gap of two substrates. A switching element for pixel selection, a scanning line for applying a scanning voltage of this switching element, a data line for applying display data, a pixel electrode, etc. are formed on the inner face of one substrate. An opposite electrode opposed to the pixel electrode or a color filter, etc. is formed in the other substrate (or the above one substrate). Here, a liquid crystal display device having a thin film transistor TFT widely adopted as the switching element is imaged, and is set to have the construction of a driving circuit chip in the following explanation. In the explanation, the scanning line for applying the above scanning voltage is set to a gate line, and the data line for applying the display data (video signal) is set to a drain line.
FIG. 9 is a typical view for explaining one example of a wiring structure of the liquid crystal display device. In FIG. 9, reference numeral SUB1 designates a first display substrate (corresponding to the above one substrate), and reference numeral SUB2 designates a second display substrate (corresponding to the above other substrate). The outer shape of the first display substrate SUB1 is larger than that of the second display substrate SUB2. The driving circuit such as a drain driver DDR, a gate driver GDR, etc. is mounted to an area projected from the second display substrate SUB2. The drain driver DDR is a driving circuit for supplying a data signal to a drain line DL. A controller CLR for generating and outputting various kinds of control signals for controlling display is built in this drain driver DDR.
The gate driver GDR is a driving circuit for supplying a scanning signal (gate signal) to a gate line GL. The operation of the gate driver GDR is controlled by a gate driver control signal outputted from the controller CLR built in the drain driver DDR. Reference numeral FPC designates a flexible printed board, and a power source IC for supplying electric power to the gate driver GDR is mounted to the flexible printed board FPC. The operation of this power source IC (hereinafter simply called a power source) PWU is controlled by the controller CLR. Further, the power source PWU supplies electric power to the gate driver GDR so that electric power is also supplied to the controller CLR.
Many pads (connecting terminals) for connection to the wirings of the drain driver DDR, the controller CLR or the gate driver GDR and the flexible printed board FPC side are arranged on the lower side of the first display substrate SUB1 in FIG. 9. Further, pads connected to the above pads are also arranged on the upper side of the flexible printed board FPC, and are joined to the wirings of the drain driver DDR, the controller CLR or the gate driver GDR by connecting both the connecting terminals. Wirings corresponding to the wirings of the drain driver DDR and the controller CLR or the gate driver GDR are formed on the first display substrate SUB1.
In FIG. 9, reference numeral PCR designates a power control signal wiring, and reference numeral CCR designates a common control signal wiring for supplying a control signal commonly used in both the power source PWU and the gate driver GDR. Reference numeral GCR designates a gate driver control signal wiring.
In the construction shown in FIG. 9, the width (the transversal direction of FIG. 9) and the length (the longitudinal direction of FIG. 9) of the second display substrate SUB2 are reduced in comparison with the first display substrate. The drain driver DDR having the controller CLR therein is mounted to the first display substrate SUB1 on the lower side in the longitudinal direction. The gate driver GDR is mounted to a rightward transversal portion of the first substrate SUB1. Scanning signals are applied to all gate lines GL from the right-hand transversal side of FIG. 9. The controller CLR can be also constructed by a separate semiconductor chip.
FIG. 10 is a typical view for explaining another example of the wiring structure of the liquid crystal display device. In FIG. 10, the same reference numerals as FIG. 9 correspond to the same function portions. In this constructional example, the width direction sizes of the first display substrate SUB1 and the second display substrate SUB2 are the same width as the first display substrate SUB1. The longitudinal direction lower side of the first display substrate SUB1 is projected, and the drain driver DDR having the controller CLR therein and two gate drivers GDR1 and GDR2 are mounted to this projected side.
As shown in FIG. 9, the gate line GL is vertically divided into two groups in the display area, and the scanning signals are applied to the respective groups from the first gate driver GDR1 and the second gate driver GDR2.
FIG. 11 is a typical view for explaining still another example of the wiring structure of the liquid crystal display device. In FIG. 11, the same reference numerals as FIGS. 9 and 10 correspond to the same function portions. In this constructional example, the width direction sizes of the first display substrate SUB1 and the second display substrate SUB2 are the same width as the first display substrate SUB1. The longitudinal direction lower side of the first display substrate SUB1 is projected, and the drain driver DDR having the controller CLR therein is mounted to this projected side.
The gate driver GDR having the power source PWU therein is mounted to the flexible printed board FPC. Similar to FIG. 10, the gate line GL is vertically divided into two groups in the display area. The scanning signals are supplied to the respective groups from the gate driver GDR mounted to the flexible printed board PFC.
A gate driver control signal and a power control signal are inputted to the gate driver GDR having the power source PWU therein through the illustrated gate driver control signal wiring GCR. These signals also include a common control signal used in control of the gate driver GDR and the power source PWU.
The flow of the control signal in FIGS. 9 to 11 will next be explained. The controller CLR outputs a signal for controlling the operation of the gate driver GDR, e.g., a pulse (CL1) of one line period, a frame head pulse (FLM), a display timing signal (DISPTMG) showing timing of gate-off, etc. These outputs are inputted to the gate driver GDR. These control signals are omitted in FIGS. 9 to 11.
The controller CLR outputs a signal for controlling the operation of the power source PWU, e.g., a clock for raising voltage (DCCLK not shown in FIGS. 9 to 11), etc. This output is inputted to the power source PWU through a connection point (pad) of the first display substrate SUB1 and the flexible printed board FPC.
Further, the controller CLR outputs a common control signal commonly used to control the operations of the gate driver GDR and the power source PWU to the common control signal wiring CCR. The signal of this kind is inputted to the power source PWU through the connection point of the first display substrate SUB1 and the flexible printed board FPC, and is inputted to the gate driver GDR as it is with respect to FIG. 11. The signal of this kind is also once transmitted to the flexible printed board FPC through the connection point with respect to FIGS. 9 and 10, and is branched to the wirings of separate layers at the point of a through hole and is then again returned to the display substrate SUB1 through a separate connection point, and is inputted to the gate driver GDR (GDR1, GDR2).
In the construction of the display device explained with reference to FIG. 9, the gate driver GDR and the drain driver DDR are respectively mounted to the rightward transversal direction side and the downward longitudinal direction side of the first display substrate SUB1 constituting this display device. Therefore, the transversal width of the display device is increased to secure each wiring space of input and output of the gate line GL so that the trim size in the transversal direction is enlarged and the display area is located in a position shifted in the leftward direction from the center. This problem is also similarly caused when the gate driver GDR is mounted to the leftward transversal side of the first display substrate SUB1.
Further, the gate control signal supplied from the controller CLR to the gate driver GDR, and the common control signal commonly used in the control of the power source PWU and the gate driver GDR must be transmitted through the wiring of the flexible printed board FPC. Therefore, the number of pads arranged in the first display substrate SUB1 and the flexible printed board FPC is increased so that the width of the flexible printed board FPC is inevitably increased. Further, since these signal wirings cross each other on the flexible printed board FPC, it is necessary to wire these signal wirings to a separate layer by using a through hole.
In the display device of the construction explained with reference to FIG. 10, since the gate driver GDR is mounted to the lower side (downward longitudinal direction side) of the first display substrate SUB1, no trim size is enlarged in comparison with the trim size shown in FIG. 9. However, similar to FIG. 9, the number of pads arranged in the first display substrate SUB1 and the flexible printed board FPC is increased so that the width of the flexible printed board FPC is inevitably increased.
In the display device of the construction explained with reference to FIG. 11, no problem of the increase in the number of pads for the gate control signal and the common control signal as in FIGS. 9 and 10 is caused.
However, a pad for the gate line GL is required. This pad number is very large in comparison with the increase in the number of pads for the gate control signal so that the width of the flexible printed board FPC is increased.